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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches Features * Low On-resistance: 60 typ, with 5V Supplies, Minimizes Distortion * On-Resistance Matching between channels better than 6 * Guaranteed Low Leakage Currents: <0.1nA at +25oC * Rail-to-Rail Analog Signal Range * Low Distortion: <0.04% (600) * Low Crosstalk: 90dB @100kHz * TTL/CMOS Compatible (with +5V or 5V Supplies) * Low Power Consumption. * 16-pin Narrow SOIC and QSOP Packages save board area * Pin-compatible upgrades for 74HC4051/4052/4053 Description The PS4051/PS4052/PS4053 are precision low-voltage CMOS analog multiplexers/switches. The PS4051 is an eight-channel single-ended mux designed to select one of eight inputs to a common output. What input is selected depends on the status of three address bits (ADDA-ADDC). The PS4052 is a differential four-channel mux, controlled by two address bits: ADDA, and ADDB. The PS4053 is a triple 2-to-1 mux (or triple SPDT, single-pole double-throw, switch). The INH (inhibit) pin can be driven high, to open all switches regardless of address bit status. All control inputs are TTL compatible when V+ = +5V. These devices are designed to operate with power supplies from 2.7V to 8V. Single-supply operation is possible from +2.7V to +16V. When on, each switch conducts current equally well in either direction and can handle rail-to-rail analog signals. In the off -state each switch blocks voltages up to the power-supply rails. Off-leakage current is guaranteed to be less than 0.1nA at +25oC, and < 2.5nA at +85oC. These devices are available in 16-pin DIP, Narrow SOIC, and QSOP packages for operation over the 40oC to +85oC temperature range. Applications * Audio and Video Switching and Routing * Lab and Medical Instrumentation * Low-Voltage Data-Acquisition and Process Control Systems * Battery-Powered Communication Systems Functional Block Diagrams and Pin Configurations Top Views PS4051 NO1 1 NO3 2 COM 3 NO7 4 NO5 5 INH 6 V- 7 GND 8 LOGIC 16 V+ 15 NO2 14 NO4 13 NO0 12 NO6 11 ADDC 10 ADDB 9 ADDA NO0B 1 NO1B 2 COMB 3 NO3B 4 NO2B 5 INH 6 V- 7 GND 8 LOGIC PS4052 16 V+ 15 NO1A 14 NO2A 13 COMA 12 NO0A 11 NO3A 10 ADDB 9 ADDA N0B 1 NCB 2 NOA 3 COMA 4 NCA 5 INH 6 V- 7 GND 8 PS4053 16 V+ 15 COMB 14 COMC 13 NOC 12 NCC LOGIC 11 ADDC 10 ADDB 9 ADDA For free samples and the latest literature: www.pericom.com, or phone 1-800-435-2336 1 PS8461 02/16/00 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches Truth Tables PS4051 IN H 1 0 0 0 0 0 0 0 0 AD D C X 0 0 0 0 1 1 1 1 AD D B X 0 0 1 1 0 0 1 1 AD D A X 0 1 0 1 0 1 0 1 On Switch N one NO0 NO1 NO2 NO3 NO4 NO5 NO6 NO7 INH 1 0 0 0 0 0 0 0 0 ADD C X 0 0 0 0 1 1 1 1 ADD B X 0 0 1 1 0 0 1 1 PS4053 ADD A X 0 1 0 1 0 1 0 1 NOC NOC NOC NOC NCC NCC NCC NCC On Switche s None NOB NOB N CB N CB NOB NOB N CB N CB NOA N CA NOA N CA NOA N CA NOA N CA PS4052 INH 1 0 0 0 0 AD D B X 0 0 1 1 AD D A X 0 1 0 1 On Switch None NO 0A,B NO 1A,B NO 2A,B NO 3A,B Logic 0, VAL 0.8V Logic 1, VIH 2.4V Absolute Maximum Ratings Voltages Referenced to V V+ ..................................................................... 0.3V to + 17V GND ................................................................. 0.3V to + 17V GND ......................................................... -0.3V to (V+) + 0.3V VIN, VCOM, VNO(1) .......................................... (V-) 2V to (V+) + 2V or 30mA, whichever occurs first Current (any terminal ) ..................................................... 30mA Peak Current, COM, NO, NC (pulsed at 1ms, 10% duty cycle) ..................................... 100mA ESD per method 3015.7 ............................................... >2000V Thermal Information Continuous Power Dissipation Plastic DIP (derate 10.5mW/C above +70C) .............. 800mW Narrow SO and QSOP (derate 8.7mW/C above +70C) .................................... 650mW Storage Temperature ........................................ -65C to +150C Lead Temperature (soldering, 10s) ................................. +300C Note 1: Signals on NO, COM, or logic inputs exceeding V+ or V are clamped by internal diodes. Limit forward diode current to 30mA. Caution: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. 2 PS8461 02/16/00 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches Electrical Specifications - Dual Supplies (V = 5V 10%, GND = 0V, VAH = VIH = 2.4V, VAL = VIL = 0.8V) Parame te r Analog Switch Analog Signal Range (3) O n Resistance O n- Resistance Match Between Channels(4) O n- Resistance Flatness(5) NO O ff Leakage Current(6) VAN ALO G V+ = 5V, V = 5V, VC O M = 3V, IN O = 1mA VC O M or VN C = 3V, IN O = 1mA, V+ = 5V, V = 5V V+ = 5V, V = 5V, IN O = 1mA, VC O M = 3V, 0V V+ = 5.5V, V = 5.5V, VC O M = 4.5V, VN O = +4.5V PS4051 Full 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full 0.1 1.0 0.1 2.5 0.1 1.5 0.1 5 0.1 2.5 V 60 V+ 100 125 12 18 10 15 50 100 50 100 50 100 50 100 50 100 nA V Symbol Conditions Te mp.(C) M in(2) Typ(1) M ax(2) Units RO N RO N RFLAT (O N ) IN O (O F F ) CO M- O ff Leakage Current(6) IC O M (O F F ) V+ = 5.5V, V = 5.5V, VC O M = 4.5V, VN O = +4.5V PS4052 PS4053 PS4051 CO M O n Leakage Current(7) IC O M (O N ) VC O M = +4.5V PS4052 PS4053 Logic Input Logic High Input Voltage Logic Low Input Voltage Input Current with Input Voltage High or Low VAH , VIH VAL , VIL 2.4 V Full VA = VI = V+, 0V - 0.1 0.8 IIH , IIL 0.1 A 3 PS8461 02/16/00 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches Electrical Specifications - Dual Supplies (continued) (V = 5V 10%, GND = 0V, VAH = VIH = 2.4V, VAL = VIL = 0.8V) Parame te r Dynamic Transition Time Break- Before- Make TimeDelay Turn- OnTime tTRAN S tO PEN tO N tO FF Q OIRR Figure 1 Figure 3 Figure 2 25 2 75 10 50 Full 25 Full 2 90 dB 92 40 175 225 150 200 10 pC ns 250 Symbol Conditions Te mp (C) M in(1) Typ(2) M ax(1) Units Turn- Off Time Charge Injection(3) Off Isolation(7) Figure 2 CL= 1nF, VS = 0V, RS = 0, CL = 15pF, VIN H = 5V, RL = 50, f = 100kHz,VN O = 1VRM S CL = 15pF, RL = 50, f = 100kHz, Figure 6, VN O = 1VRM S f =1MHz f =1MHz, VN O = 0V PS4051 PS4052 PS4053 PS4051 Crosstalk Logic Input Capacitance NO Off Capacitance COM Off Capacitance XTALK C IN C N O (O F F ) 25 8 2 2 2 8 8 pF CC O M (O FF) f =1MHz, VC O M =0V CO M O n Capacitance CC O M (O N ) f =1MHz, VC O M = 0V PS4052 PS4053 Supply Power- Supply Range Positive Supply Current Negative Supply Current I+ I VIN H = VA = 0V or V+, V+ =5.5V, V = 5.5V Full 10 2.7 8 10 A V Notes: 1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design 4. R = R max - R min 5. Flatness is defined as the difference between the maximum and minimum values of on-resistance measured over the specific analog signal range, i.e., VNO = 3V to 0 and 0V to -3V. 6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25C. 7. Off Isolation = 20log10 VCOM / VNO. See Figure 5. 4 PS8461 02/16/00 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches Electrical Characteristics - Single 5V Supply (V+ = +5V 10%, V- = 0V, GND = 0V, VAH = VIH = 2.4V, VAL = VIL = 0.8V) Parame te r Switch Analog Signal Range(3) Symbol Conditions Te mp (C) M in(1) Typ(2) M ax(1) Units VAN ALO G RO N IN O = 1mA, VC O M = 3.5V, V+ = 4.5V VN O = 0V, VC O M = 4.5V, V+ = 5.5V V+ = 5.5V, VC O M = 4.5V, VN O =0V, or VC O M = 0V, VN O = 4.5V PS4051 PS4052 PS4053 PS4051 PS4052 PS4053 Full 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full 0 125 V+ 225 280 V On Resistance NO- Off Leakage Current(8) IN O (O FF) 0.1 10 1 10 1 5 1 10 1 10 50 100 50 100 50 100 50 100 50 100 n COM- Off Leakage Current(8) IC O M (O FF) COM- On Leakage Current(8) IC O M (O N ) VC O M = VN O = 4.5V, V+ = 5.5V Digital Logic Input Logic High Input Voltage Logic Low Input Voltage Input Current with Input Voltage High or Low VAH , VIH VAL , VIL IIH , IIL VA= VI = V +, 0V Full 1 2.4 0.8 1 V A Supply Positive- Supply Current I+ VA = VI = 0V or V+ 25 Full 1.0 1.0 10 A 5 PS8461 02/16/00 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches Electrical Characteristics - Single 5V(continued) (V+ = +5V 10%, V- = 0V, GND = 0V, VAH = VIH = 2.4V, VAL = VIL = 0.8V) Parame te r Dynamic Turn- OnTime Turn- Off Time Break- Before- Make Interval Charge Injection(3) tON tOFF tOPEN Q CL = 1nF, VS = 0V, RS = 0 25 Full 25 Full 25 30 1.5 5 pC 60 90 200 275 125 175 ns Symbol Conditions Te mp (C) M in(1) Typ(2) M ax(1) Units Electrical Characteristics - Single 3V Supply (V+ = +3.3V 10%, V- = 0V, GND = 0V, VAH = VIH = +2.4V, VAL = VILL = +0.8V) Parame te r Switch Analog Signal Range(3) O n- Resistance D ynamic Transition Time(3) Turn- O nTime(3) Turn- O ff Time(3) Charge Injection (3) tTRANS tON tOFF Q Figure 1, VIN = 2.4V VNO1 = 1.5V, VNO8 = 0V Figure 2, VINH = 2.4V VINL = 0V, VNO1 = 1.5V Figure 2, VINH = 2.4V VINL = 0V, VNO1 = 1.5V CL = 10nF, VS = 0V, RS = 0 25 230 200 75 1 575 500 400 5 pC ns VANALOG RON INO = 1mA, VCOM = 1.5V, V+ = 3V Full 25 Full 0 250 V+ 525 700 V Symbol Conditions Te mp (C) M in(1) Typ(2) M ax(1) Units Notes: 1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design 4. R = R max - R min 5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured. 6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25C. 7. Worst-case isolation is on channel 4 because of its proximity to the COM pin. Off isolation = 20log VCOM/VNO, VCOM = output, VNO = input to off switch 8. Leakage testing at single supply is guaranteed by testing with dual supplies. 6 PS8461 02/16/00 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches Test Circuits/Timing Diagrams V+ V+ NO0 NO1-NO6 V+ Logic Input V+ 50% 0V VNO0 VVOUT 35pF Switch Output VOUT VNO7 ttrans ON V+ V+ NO V90% ttrans tr <20ns tf <20ns ADDC ADDB ADDA 509 90% PS4051 INH GND V- NO7 COM 3009 V- 0V V+ V+ NO0 NO1-NO2 V+ 509 VVOUT 35pF INH GND 3009 V- ADDB ADDA 509 ADD PS4052 INH GND V- NO3 COM PS4053 V- NC COM V+ VOUT 35pF 3009 V- Figure 1. Transition Time V+ V+ NO0 NOX V+ Logic Input V+ 50% 0V tON 90% Switch Output COM GND V3009 V+5V V+ NO V+ Logic Input V+ 50% 0V tON 0V tr <20ns tf <20ns tOFF 10% VOUT 35pF Switch Output VOUT VV90% 35pF 0V VOUT VOUT 10% tr <20ns tf <20ns tOFF INH 509 ADDX PS4051 PS4052 INH 509 ADD PS4053 GND V- NC COM 3009 V- Figure 2. Switching Times 7 PS8461 02/16/00 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches Figure 3. Break-Before-Make Interval Figure 4. Charge Injection V+ 10nF NO0 VIN R = 1k9 NO1 V+ RG = 509 ~ NO7 509 ADD PS4051 PS4052 COM VOUT RL = 509 INH GND 10nF V- VCROSSTALK = 20log VOUT VIN Figure 5. Off Isolation 8 Figure 6. Crosstalk PS8461 02/16/00 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches Figure 8. NO/COM Capacitance Ordering Information Part Numbe r PS4051CPE PS4051CSE PS4051CEE PS4051EPE PS4051ESE PS4051EEE PS4052CPE PS4052CSE PS4052CEE Te mpe rature 0C to +70C 0C to +70C 0C to +70C 40C to +85C 40C to +85C 40C to +85C 0C to +70C 0C to +70C 0C to +70C Package PDIP- 16 Narrow SOIC- 16 QSOP- 16 PDIP- 16 Narrow SOIC- 16 QSOP- 16 PDIP- 16 Narrow SOIC- 16 QSOP- 16 Part Numbe r PS4052EPE PS4052ESE PS4052EEE PS4053CPE PS4053CSE PS4053CEE PS4053EPE PS4053ESE PS4053EEE Te mpe rature 40C to +85C 40C to +85C 40C to +85C 0C to +70C 0C to +70C 0C to +70C 40C to +85C 40C to +85C 40C to +85C Package PDIP- 16 Narrow SOIC- 16 QSOP- 16 PDIP- 16 Narrow SOIC- 16 QSOP- 16 PDIP- 16 Narrow SOIC- 16 QSOP- 16 Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com 9 PS8461 02/16/00 |
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